Hardware Refinement
Hardware Refinement is a formal methodology within hardware modeling for digital systems that specifies the stepwise transformation of an abstract hardware design into a more detailed, functionally equivalent implementation while preserving correctness through rigorous verification.
30
Publications
732
Citations
89
Authors
47
Institutions
Publications per year
2017–2026
0
30
Daniel D. Gajski, Frank Vahid, Sanjiv M. Narayan et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1998 · 125 citations
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University of Utah
Salt Lake City, United States
3 h-index
4 publications
44 citations
University of California, Riverside
Riverside, United States
2 h-index
2 publications
152 citations
Carnegie Mellon University
Pittsburgh, United States
2 h-index
5 publications
131 citations

Paderborn University
Paderborn, Germany
2 h-index
6 publications
78 citations
Qualcomm (United States)
San Diego, United States
2 h-index
2 publications
152 citations
University of Verona
Verona, Italy
2 h-index
6 publications
78 citations
Siemens (Germany)
Munich, Germany
2 h-index
8 publications
192 citations
Techniques of Informatics and Microelectronics for Integrated Systems Architecture
Grenoble, France
2 h-index
7 publications
136 citations
1–8 of 47
Conference · 2 publications · 46 citations
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Conference · 2 publications · 25 citations
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TODAES · 1 publications · 29 citations
1
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1 publications · 11 citations
1
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1 publications · 125 citations
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