Hardware Abstraction Layers

Hardware Abstraction Layer is a software interface that belongs to the category of system-level design frameworks, distinguished by its role in encapsulating low-level hardware-specific details to provide uniform and portable access to peripheral devices in embedded systems.

139

Publications

5.8K

Citations

536

Authors

174

Institutions

Publications per year

2017–2026

25

Authors

536

  1. AJ
    Ahmed Jerraya

    Techniques of Informatics and Microelectronics for Integrated Systems Architecture, France

    5 publications · 227 citations

    5

    h-index

  2. SY
    Sungjoo Yoo

    Seoul National University, South Korea

    3 publications · 99 citations

    4

    h-index

  3. AB
    Aimen Bouchhima

    Techniques of Informatics and Microelectronics for Integrated Systems Architecture, France

    4 publications · 132 citations

    4

    h-index

  4. DL
    D. Lyonnard

    Techniques of Informatics and Microelectronics for Integrated Systems Architecture, France

    3 publications · 123 citations

    3

    h-index

  5. SM
    Subhasish Mitra

    Stanford University, United States

    3 publications · 106 citations

    3

    h-index

1–5 of 536

Venues

  1. IEEE Design & Test of Computers

    3 publications · 97 citations

    3

    h-index

  2. 3

    h-index

  3. 3

    h-index

  4. 2

    h-index

  5. IBM Journal of Research and Development

    2 publications · 37 citations

    2

    h-index

1–5