Concepedia

Double Patterning Layout

Double Patterning Layout is a photolithographic decomposition method in Very-Large-Scale Integration (VLSI) physical design that partitions a single metal or via layer into two separate mask layouts to overcome optical resolution limits by ensuring feature pitch compliance with manufacturing constraints.

113

Publications

4K

Citations

389

Authors

73

Institutions

Publications per year

2017–2026

6

Parents

Publications

113

A 14nm logic technology featuring 2<sup>nd</sup>-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm<sup>2</sup> SRAM cell size

S. Natarajan, M. Agostinelli, Sheikh A. Akbar et al. · 2014 · 532 citations

, , +16

Layout Decomposition Approaches for Double Patterning Lithography

Andrew B. Kahng, Chul‐Hong Park, Xu Xu et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2010 · 124 citations

, , +12

Design for Manufacturing With Emerging Nanolithography

David Z. Pan, Bei Yu, Jhih-Rong Gao · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2013 · 124 citations

, , +16

Double patterning design split implementation and validation for the 32nm node

Martin Drapeau, Vincent Wiaux, Eric Hendrickx et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2007 · 95 citations

, , +13

Layout decomposition for triple patterning lithography

Bei Yu, Kun Yuan, Boyang Zhang et al. · 2011 · 92 citations · Full text

, , +12

1–5 of 113

Authors

389

  1. DZ
    David Z. Pan

    The University of Texas at Austin, United States

    21 publications · 985 citations

    17

    h-index

  2. MD
    Martin D. F. Wong

    University of Illinois Urbana-Champaign, United States

    10 publications · 314 citations

    10

    h-index

  3. KY
    Kun Yuan

    The University of Texas at Austin, United States

    8 publications · 459 citations

    8

    h-index

  4. AB
    Andrew B. Kahng

    University of California San Diego, United States

    8 publications · 324 citations

    8

    h-index

  5. YD
    Yuelin Du

    University of Illinois Urbana-Champaign, United States

    7 publications · 150 citations

    7

    h-index

1–5 of 389

Institutions

73

  1. The University of Texas at Austin

    Austin, United States

    16 h-index

    57 publications

    2.6K citations

  2. GlobalFoundries (United States)

    Santa Clara, United States

    10 h-index

    27 publications

    557 citations

  3. University of Illinois Urbana-Champaign

    Urbana, United States

    10 h-index

    32 publications

    977 citations

  4. IMEC

    Leuven, Belgium

    9 h-index

    45 publications

    1.4K citations

  5. IBM (United States)

    Armonk, United States

    9 h-index

    13 publications

    445 citations

  6. Cadence Design Systems (United States)

    San Jose, United States

    9 h-index

    16 publications

    318 citations

  7. University of California San Diego

    San Diego, United States

    8 h-index

    18 publications

    653 citations

  8. ASML (Netherlands)

    Veldhoven, The Netherlands

    7 h-index

    25 publications

    1.2K citations

1–8 of 73

Venues

  1. 17

    h-index

  2. 10

    h-index

  3. 4

    h-index

  4. International Conference on Computer Aided Design

    Conference · 4 publications · 82 citations

    4

    h-index

  5. Microelectronic Engineering

    2 publications · 37 citations

    2

    h-index

1–5