Concepedia

Distributed Clamp Design

Distributed Clamp Design is a protection circuit architecture that integrates multiple electrostatic discharge (ESD) clamping devices strategically across an integrated circuit to uniformly limit voltage overshoot and enhance on-chip ESD robustness by minimizing parasitic inductance and resistance effects during transient events.

14

Publications

470

Citations

48

Authors

12

Institutions

Publications per year

2017–2026

1

Parents

Publications

14

Boosted and distributed rail clamp networks for ESD protection in advanced CMOS technologies

Michael Stockinger, James W. Miller, Michael G. Khazhinsky et al. · 2003 · 93 citations

, , +8

Boosted and distributed rail clamp networks for ESD protection in advanced CMOS technologies

Stockinger, M A. Miller, Khazhinsky et al. · Electrical Overstress/Electrostatic Discharge Symposium · 2003 · 88 citations

, , +8

Modular, portable, and easily simulated ESD protection networks for advanced CMOS technologies

Cynthia A. Torres, James W. Miller, Michael Stockinger et al. · Microelectronics Reliability · 2002 · 56 citations

, , +11

ESD issues in advanced CMOS bulk and FinFET technologies: Processing, protection devices and circuit strategies

Christian Russ · Microelectronics Reliability · 2008 · 47 citations

, , +16

A low leakage low cost-PMOS based power supply clamp with active feedback for ESD protection in 65nm CMOS technologies

Jeremy C. Smith, Roger Cline, Gianluca Boselli · 2005 · 32 citations

, , +13

1–5 of 14

Authors

48

  1. MS
    Michael Stockinger

    Motorola (United States), United States

    5 publications · 194 citations

    5

    h-index

  2. JW
    James W. Miller

    Motorola (United States), United States

    4 publications · 184 citations

    4

    h-index

  3. JC
    James C. Weldon

    Motorola (United States), United States

    3 publications · 159 citations

    3

    h-index

  4. MG
    Michael G. Khazhinsky

    Motorola (United States), United States

    3 publications · 159 citations

    3

    h-index

  5. GM
    G. Mabboux

    STMicroelectronics (France), France

    2 publications · 52 citations

    2

    h-index

1–5 of 48

Institutions

12

  1. Intel (United States)

    Santa Clara, United States

    2 h-index

    5 publications

    79 citations

  2. Mission College

    Santa Clara, United States

    2 h-index

    2 publications

    34 citations

  3. Motorola (United States)

    Schaumburg, United States

    2 h-index

    14 publications

    1.1K citations

  4. STMicroelectronics (Switzerland)

    Geneva, Switzerland

    1 h-index

    1 publications

    23 citations

  5. Synopsys (United States)

    Mountain View, United States

    1 h-index

    1 publications

    93 citations

  6. STMicroelectronics (France)

    Montrouge, France

    1 h-index

    6 publications

    174 citations

  7. Technicolor (France)

    Paris, France

    1 h-index

    2 publications

    46 citations

  8. Silicon Labs (United States)

    Austin, United States

    1 h-index

    1 publications

    32 citations

1–8 of 12

Venues

  1. Microelectronics Reliability

    5 publications · 145 citations

    5

    h-index

  2. Electrical Overstress/Electrostatic Discharge Symposium

    Conference · 3 publications · 116 citations

    3

    h-index

  3. Journal of Electrostatics

    1 publications · 29 citations

    1

    h-index

  4. IEEE Journal of Solid-State Circuits

    1 publications · 10 citations

1–4