Complementary Metal-oxide-semiconductor Logic

Complementary Metal-Oxide-Semiconductor Logic is a digital logic family that implements Boolean functions using a combination of enhancement-mode n-channel and p-channel Metal-Oxide-Semiconductor Field-Effect Transistors in a complementary push-pull configuration to achieve low static power consumption and high noise immunity.

302

Publications

12.4K

Citations

1.2K

Authors

325

Institutions

Publications per year

2017–2026

71

Authors

1.2K

  1. YK
    Ya‐Chin King

    National Tsing Hua University, Taiwan

    6 publications · 273 citations

    6

    h-index

  2. CJ
    Chrong Jung Lin

    National Tsing Hua University, Taiwan

    4 publications · 55 citations

    4

    h-index

  3. NP
    Neeta Pandey

    Delhi Technological University, India

    4 publications · 81 citations

    4

    h-index

  4. YT
    Yi-Hung Tsai

    National Tsing Hua University, Taiwan

    4 publications · 95 citations

    4

    h-index

  5. KG
    Kirti Gupta

    Delhi Technological University, India

    3 publications · 65 citations

    3

    h-index

1–5 of 1.2K

Venues

  1. IEEE Journal of Solid-State Circuits

    21 publications · 1.4K citations

    14

    h-index

  2. IEEE Electron Device Letters

    19 publications · 592 citations

    13

    h-index

  3. Electronics Letters

    15 publications · 265 citations

    12

    h-index

  4. IEEE Transactions on Electron Devices

    12 publications · 968 citations

    11

    h-index

  5. Applied Physics Letters

    7 publications · 274 citations

    7

    h-index

1–5