Complementary Metal-oxide-semiconductor Logic
Complementary Metal-Oxide-Semiconductor Logic is a digital logic family that implements Boolean functions using a combination of enhancement-mode n-channel and p-channel Metal-Oxide-Semiconductor Field-Effect Transistors in a complementary push-pull configuration to achieve low static power consumption and high noise immunity.
302
Publications
12.4K
Citations
1.2K
Authors
325
Institutions
Publications per year
2017–2026
71
Variants
Cmos Logic
302
High-Gain Inverters Based on WSe<sub>2</sub> Complementary Field-Effect Transistors
Mahmut Tosun, Steven S.C. Chuang, Hui Fang et al. · ACS Nano · 2014 · 320 citations
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IBM (United States)
Armonk, United States
10 h-index
31 publications
927 citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
10 h-index
26 publications
516 citations
National Tsing Hua University
Hsinchu, Taiwan
8 h-index
44 publications
1.7K citations
Intel (United States)
Santa Clara, United States
8 h-index
9 publications
287 citations

Tohoku University
Sendai, Japan
6 h-index
19 publications
1.8K citations
University of California, Berkeley
Berkeley, United States
6 h-index
28 publications
3.5K citations
Hitachi (Japan)
Tokyo, Japan
5 h-index
29 publications
3.5K citations
École Polytechnique Fédérale de Lausanne
Lausanne, Switzerland
5 h-index
18 publications
658 citations
1–8 of 325
21 publications · 1.4K citations
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19 publications · 592 citations
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15 publications · 265 citations
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12 publications · 968 citations
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7 publications · 274 citations
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