Complementary Metal-oxide-semiconductor Biasing

Complementary Metal-Oxide-Semiconductor Biasing is a transistor biasing technique that establishes and stabilizes the operating point of complementary MOSFET pairs in integrated circuits by precisely setting gate-source voltages to ensure balanced current flow and minimal static power dissipation.

261

Publications

13.6K

Citations

910

Authors

275

Institutions

Publications per year

2017–2026

47

Variants

Cmos Biasing

Authors

910

  1. DF
    Denis Flandre

    UCLouvain, Belgium

    5 publications · 135 citations

    5

    h-index

  2. SB
    Sérgio Bampi

    Universidade Federal do Rio Grande do Sul, Brazil

    5 publications · 184 citations

    5

    h-index

  3. HK
    Hamilton Klimach

    Universidade Federal do Rio Grande do Sul, Brazil

    5 publications · 184 citations

    5

    h-index

  4. DC
    David Cordova

    Universidade Federal do Rio Grande do Sul, Brazil

    5 publications · 184 citations

    5

    h-index

  5. BM
    B.A. Minch

    Cornell University, United States

    4 publications · 95 citations

    4

    h-index

1–5 of 910

Venues

  1. IEEE Journal of Solid-State Circuits

    21 publications · 5K citations

    18

    h-index

  2. IEEE Transactions on Electron Devices

    18 publications · 972 citations

    16

    h-index

  3. IEEE Electron Device Letters

    16 publications · 694 citations

    14

    h-index

  4. Electronics Letters

    16 publications · 476 citations

    13

    h-index

  5. 9

    h-index

1–5