Back-end Of Line Processing
Back-End of Line Processing is a stage in integrated circuit fabrication that encompasses the processes of forming interconnects, vias, and dielectric layers to electrically connect transistors and other devices, distinguishing it from the Front-End of Line processes focused on device fabrication.
22
Publications
1.5K
Citations
143
Authors
48
Institutions
Publications per year
2017–2026
5
Variants
BeolBeol Processing
22
Wafer‐Scale Synthesis of Graphene on Sapphire: Toward Fab‐Compatible Graphene
Neeraj Mishra, Stiven Forti, Filippo Fabbri et al. · Small · 2019 · 98 citations · Full text
Natural Sciences, Materials Engineering, Materials Science +17
1–5 of 22
143
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1–5 of 143
48
Stanford University
Stanford, United States
3 h-index
9 publications
421 citations
Arizona State University
Tempe, United States
3 h-index
10 publications
1.9K citations
Lam Research (United States)
Fremont, United States
2 h-index
3 publications
104 citations

Hunan University
Changsha, China
2 h-index
32 publications
2.5K citations
University of California, Berkeley
Berkeley, United States
2 h-index
6 publications
95 citations
National Tsing Hua University
Hsinchu, Taiwan
2 h-index
7 publications
111 citations
North Carolina State University
Raleigh, United States
1 h-index
7 publications
147 citations
National Enterprise for NanoScience and NanoTechnology
Pisa, Italy
1 h-index
2 publications
196 citations
1–8 of 48
3 publications · 436 citations
3
h-index
2 publications · 52 citations
2
h-index
2 publications · 62 citations
2
h-index
2 publications · 124 citations
2
h-index
1 publications · 217 citations
1
h-index
1–5