Wafer‐Scale Synthesis of Graphene on Sapphire: Toward Fab‐Compatible Graphene

Abstract

The adoption of graphene in electronics, optoelectronics, and photonics is hindered by the difficulty in obtaining high-quality material on technologically relevant substrates, over wafer-scale sizes, and with metal contamination levels compatible with industrial requirements. To date, the direct growth of graphene on insulating substrates has proved to be challenging, usually requiring metal-catalysts or yielding defective graphene. In this work, a metal-free approach implemented in commercially available reactors to obtain high-quality monolayer graphene on c-plane sapphire substrates via chemical vapor deposition is demonstrated. Low energy electron diffraction, low energy electron microscopy, and scanning tunneling microscopy measurements identify the Al-rich reconstruction <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML"> <mml:mrow> <mml:mrow> <mml:mfenced> <mml:mrow> <mml:msqrt><mml:mrow><mml:mn>31</mml:mn></mml:mrow> </mml:msqrt> <mml:mo>×</mml:mo> <mml:msqrt><mml:mrow><mml:mn>31</mml:mn></mml:mrow> </mml:msqrt> </mml:mrow> </mml:mfenced> </mml:mrow> <mml:mi>R</mml:mi> <mml:mo>±</mml:mo> <mml:mn>9</mml:mn></mml:mrow> </mml:math> ° of sapphire to be crucial for obtaining epitaxial graphene. Raman spectroscopy and electrical transport measurements reveal high-quality graphene with mobilities consistently above 2000 cm² V^-1 s^-1 . The process is scaled up to 4 and 6 in. wafers sizes and metal contamination levels are retrieved to be within the limits for back-end-of-line integration. The growth process introduced here establishes a method for the synthesis of wafer-scale graphene films on a technologically viable basis.