C. F. Nieh

65nm CMOS high speed, general purpose and low power transistor technology for high volume foundry application

S.K.H. Fung, H.T. Huang, Sheng-Jen Cheng et al. · 2004 · 45 citations · Full text

Engineering, Electrical Engineering, Low-power Design +13

A highly scaled, high performance 45 nm bulk logic CMOS technology with 0.242 μm<sup>2</sup> SRAM cell

Kuan‐Lun Cheng, Chung-Cheng Wu, Y.P. Wang et al. · 2007 · 37 citations

Engineering, Computer Engineering, Electrical Engineering +16

Effects of germanium and carbon coimplants on phosphorus diffusion in silicon

Kai‐Wei Ku, C. F. Nieh, Jingjing Gong et al. · Applied Physics Letters · 2006 · 28 citations

Engineering, Materials Engineering, Materials Science +17

Millisecond Anneal and Short-Channel Effect Control in Si CMOS Transistor Performance

C. F. Nieh, Kai‐Wei Ku, C. H. Chen et al. · IEEE Electron Device Letters · 2006 · 12 citations

Engineering, Electrical Engineering, Materials Science +17

Revealing the Potential of Perovskite Transistors for Dual-Modulated Synaptic Behavior through Heterojunction Design

Yen‐Han Shih, Qun‐Gao Chen, Chiung-Han Chen et al. · ACS Energy Letters · 2024 · 12 citations · Full text

Natural Sciences, Materials Engineering, Materials Science +17