Sheng-Chih Lai - Concepedia

Author

Sheng-Chih Lai

Macronix International (Taiwan)

Also Known As

S. C. Lai, S.-C Lai, S.C. Lai, Sheng-Chih Lai

Publications

622

Citations

H-Index

Concepts

All Affiliations

Macronix International (Taiwan)National Tsing Hua University National Institutes of Applied Research IBM Research - Thomas J. Watson Research Center Macronix International (China)

About

Sheng-Chih Lai is an author at Macronix International (Taiwan) specializing in electrical engineering, engineering, and applied physics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	11	13	440
2	Applied Physics	10	11	414
3	Social Sciences	1	1	10
4	Biomedical Engineering	1	1	25
5	Chemical Engineering	1	1	11

Sheng-Chih Lai

Publications

507

Citations

H-Index

Page 1

	Year	Citations
BE-SONOS: A bandgap engineered SONOS with excellent performance and reliability Hang-Ting Lue, Szu-Yu Wang, Erh-Kun Lai, SemiconductorsNon-volatile MemoryElectrical EngineeringElectronic DevicesEngineering	2006	134
A high performance phase change memory with fast switching speed and high temperature retention by engineering the Ge<inf>x</inf>Sb<inf>y</inf>Te<inf>z</inf> phase change material Huai‐Yu Cheng, T. H. Hsu, Simone Raoux, EngineeringComputer ArchitecturePhase Change MemoryNew MaterialMemory Devices	2011	77
A thermally robust phase change memory by engineering the Ge/N concentration in (Ge, N)<inf>x</inf>Sb<inf>y</inf>Te <inf>z</inf> phase change material Huai‐Yu Cheng, J.Y. Wu, R. Cheek,	2012	40
Extended-pulse excimer laser annealing of Pb(Zr1−xTix)O3 thin film on LaNiO3 electrode Sheng-Chih Lai, Hang-Ting Lue, K. Y. Hsieh, Journal of Applied Physics Optical MaterialsEngineeringLaser ApplicationsOptoelectronic DevicesLow Temperature	2004	28
Understanding STI edge fringing field effect on the scaling of charge-trapping (CT) NAND Flash and modeling of incremental step pulse programming (ISPP) Hang-Ting Lue, Tzu‐Hsuan Hsu, Yi‐Hsuan Hsiao, Device ModelingElectrical EngineeringField EffectEngineeringIncremental Step	2009	28
Physical Model of Field Enhancement and Edge Effects of FinFET Charge-Trapping NAND Flash Devices Tzu‐Hsuan Hsu, Hang-Ting Lue, Ya‐Chin King, IEEE Transactions on Electron Devices Device ModelingNon-volatile MemoryElectrical EngineeringEngineeringPhysics	2009	26
MA BE-SONOS: A Bandgap Engineered SONOS using Metal Gate and Al2O3 Blocking Layer to Overcome Erase Saturation Sheng-Chih Lai, Hang-Ting Lue, Ming-Jui Yang, Wide-bandgap SemiconductorEngineeringTunnel OxideIntegrated CircuitsBandgap Engineered Sonos	2007	25
A novel double-density, single-gate vertical channel (SGVC) 3D NAND Flash that is tolerant to deep vertical etching CD variation and possesses robust read-disturb immunity Hang-Ting Lue, Tzu‐Hsuan Hsu, Chen-Jun Wu, Non-volatile MemoryElectrical EngineeringSgvc DeviceEngineeringNanoelectronics	2015	25
Modeling of Barrier-Engineered Charge-Trapping nand Flash Devices Hang-Ting Lue, Sheng-Chih Lai, Tzu‐Hsuan Hsu, IEEE Transactions on Device and Materials Reliability EngineeringMultilayer BarrierCharge TransportSemiconductor DeviceSemiconductors	2010	24
Understanding barrier engineered charge-trapping NAND flash devices with and without high-K dielectric Hang-Ting Lue, Sheng-Chih Lai, Tzu‐Hsuan Hsu, IEEE International Reliability Physics Symposium proceedings EngineeringCharge-trapping Nand FlashCharge TransportSemiconductor DeviceTunneling Microscopy	2009	20

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