J. Bea

Wafer thinning, bonding, and interconnects induced local strain/stress in 3D-LSIs with fine-pitch high-density microbumps and through-Si vias

M. Murugesan, Hisashi Kino, Hiroshi Nohira et al. · 2010 · 81 citations

Engineering, Mechanical Engineering, Integrated Circuits +22

Impact of remnant stress/strain and metal contamination in 3D-LSIs with through-Si vias fabricated by wafer thinning and bonding

M. Murugesan, J. Bea, Hisashi Kino et al. · 2009 · 43 citations

Engineering, Mechanical Engineering, Integrated Circuits +20

Non-conductive film and compression molding technology for self-assembly-based 3D integration

Takafumi Fukushima, Yuki Ohara, J. Bea et al. · 2012 · 16 citations

Engineering, Computer-aided Design, Integrated Circuits +24

Fully-Filled, Highly-Reliable Fine-Pitch Interposers with TSV Aspect Ratio >10 for Future 3D-LSI/IC Packaging

Murugesan Murugesan, Takafumi Fukushima, Kiyoharu Mori et al. · 2019 · 13 citations

Electrical Resistance, Engineering, Integrated Circuits +21