LED and CMOS Image Sensor Based Optical Wireless Communication System for Automotive Applications

Isamu Takai, S. Ito, Keita Yasutomi, +3

IEEE photonics journal

Analytical and experimental study for designing molding compounds for surface mounting devices

S. Ohizumi, M. Ngasawa, K. Igarashi, +2

EngineeringFood PackagingMechanical EngineeringNitto Corporation EngineersComputer-aided Design +18

Fabrication of graphene on atomically flat diamond (111) surfaces using nickel as a catalyst

Shohei Kanada, Masatsugu Nagai, S. Ito, +6

Diamond and Related Materials

Materials ScienceGraphene NanomeshesDiamond-like CarbonEngineeringCarbon-based Material +5

Local lattice strain distribution around a transistor channel in metal–oxide–semiconductor devices

Akio Toda, Nobuyuki Ikarashi, Haruhiko Ono, +3

Applied Physics Letters

SemiconductorsSemiconductor TechnologyElectrical EngineeringEngineeringCrystalline Defects +11

Multi-step word-line control technology in hierarchical cell architecture for scaled-down high-density SRAMs

Koichi Takeda, T. Saito, Shinobu Asayama, +7

Hierarchical Cell ArchitectureElectrical EngineeringRandom VariabilityEngineeringVlsi Design +10

Special properties of molding compound for surface mounting devices

T. Nishioka, M. Nagasaqa, Kazuei Igarashi, +2

Materials ScienceLow-tg Molding CompoundsMold ControlEngineeringMechanical Properties +9

Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs

Koichi Takeda, Toshio Saito, Shinobu Asayama, +7

IEEE Journal of Solid-State Circuits

Hierarchical Cell ArchitectureElectrical EngineeringRandom VariabilityEngineeringVlsi Design +10

Molding compounds for thin surface mount packages and large chip semiconductor devices

S. Ito, T. Nishioka, S. Oizumi, +2

Materials ScienceAdvanced PackagingChip-scale PackageEngineeringAdvanced Packaging (Semiconductors) +13

A Robust Embedded Ladder-Oxide/Cu Multilevel Interconnect Technology for 0.13 µm Complementary Metal Oxide Semiconductor Generation

Noriaki Oda, S. Ito, T. Takewaki, +18

Japanese Journal of Applied Physics

Materials ScienceAdvanced PackagingElectrical EngineeringElectromigration TechniqueEngineering +11

High Performance Ultra Low-k (k=2.0/keff=2.4)/Cu Dual-Damascene Interconnect Technology with Self-Formed MnSixOy Barrier Layer for 32 nm-node

T. Usui, Kazunobu Tsumura, H. Nasu, +11

EngineeringEffective Dielectric ConstantInterconnect (Integrated Circuits)Advanced Packaging (Semiconductors)Nanoelectronics +14