Sung Dae Suk

High performance 5nm radius Twin Silicon Nanowire MOSFET (TSNWFET) : fabrication on bulk si wafer, characteristics, and reliability

Sung Dae Suk, Sung‐Young Lee, Sungmin Kim et al. · 2006 · 233 citations

Engineering, Electrical Engineering, Materials Science +17

Gate-All-Around (GAA) Twin Silicon Nanowire MOSFET (TSNWFET) with 15 nm Length Gate and 4 nm Radius Nanowires

Kyoung Hwan Yeo, Sung Dae Suk, Ming Li et al. · 2006 · 197 citations

Engineering, Electrical Engineering, Materials Science +17

Investigation of nanowire size dependency on TSNWFET

Sung Dae Suk, Ming Li, Yun Young Yeoh et al. · 2007 · 90 citations

Engineering, Electrical Engineering, Materials Science +17

Sub-10 nm gate-all-around CMOS nanowire transistors on bulk Si substrate

Ming Li, Kyoung Hwan Yeo, Sung Dae Suk et al. · Symposium on VLSI Technology · 2006 · 71 citations

Engineering, Electrical Engineering, Materials Science +17

High-Performance Twin Silicon Nanowire MOSFET (TSNWFET) on Bulk Si Wafer

Sung Dae Suk, Kyoung Hwan Yeo, Keun Hwi Cho et al. · IEEE Transactions on Nanotechnology · 2008 · 55 citations

Engineering, Electrical Engineering, Materials Science +17