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High-Performance Twin Silicon Nanowire MOSFET (TSNWFET) on Bulk Si Wafer
55
Citations
10
References
2008
Year
Electrical EngineeringWafer Scale ProcessingEngineeringBulk Si WaferNanotechnologyNanoelectronicsElectronic EngineeringApplied PhysicsSilicon Nanowire MosfetBottom Parasitic TransistorNanowire DiameterSemiconductor Device FabricationSilicon On InsulatorMicroelectronicsSemiconductor Device
A gate-all-around (GAA) twin silicon nanowire MOSFET (TSNWFET) with 5-nm-radius channels on a bulk Si wafer is successfully fabricated to achieve extremely high-drive currents of 2.37 mA/ mum for n-channel and 1.30 mA/ mum for p-channel TSNWFETs with mid-gap TiN metal gate that are normalized by a nanowire diameter. It also shows good short-channel effects immunity down to 30-nm gate length due to the GAA structure and the nanowire channel. The effect of bottom parasitic transistor in TSNWFET is also investigated.
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