Symposium on VLSI Technology · 2006 · 71 citations · 0 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsCmos Circuit DesignField-effect TransistorsIntegrated Circuit DesignMetal-oxide-semiconductor Field-effect TransistorsNanoelectronicsNanowiresGate Oxide Thickness EffectsGate-all-around TransistorsLeakageNanowire DevicesNanowire Field-effect TransistorsNanowire TransistorsSemiconductor NanowiresSilicon Nanowires
In this paper, sub-10 nm gate-all-around (GAA) CMOS silicon nanowire field-effect transistors (SNWFET) on bulk Si substrate are fabricated successfully for the first time with 13-nm-diameter silicon nanowire channel. On-state currents of 1494/1054 muA/mum at off leakage currents of 102/6.44 nA/mum are obtained for N/PMOS, respectively. The impacts of nanowire diameter (DNW) and gate oxide thickness (TOX) as well S/D parasitic resistance (RSD) on performance are investigated in details.