Valipe Ramgopal Rao

Fabrication and Analysis of a ${\rm Si}/{\rm Si}_{0.55}{\rm Ge}_{0.45}$ Heterojunction Line Tunnel FET

A. Walke, A. Vandooren, R. Rooyackers et al. · IEEE Transactions on Electron Devices · 2014 · 147 citations

Engineering, Electrical Engineering, Materials Engineering +16

CMOS Logic Device and Circuit Performance of Si Gate All Around Nanowire MOSFET

Kaushik Nayak, Mohit Bajaj, Aniruddha Konar et al. · IEEE Transactions on Electron Devices · 2014 · 78 citations

Engineering, Computer Engineering, Electrical Engineering +17

A Thermal-Aware Device Design Considerations for Nanoscale SOI and Bulk FinFETs

U. Sajesh Kumar, Valipe Ramgopal Rao · IEEE Transactions on Electron Devices · 2015 · 67 citations

Engineering, Electrical Engineering, Heat Transfer +16

Part I: Impact of Field-Induced Quantum Confinement on the Subthreshold Swing Behavior of Line TFETs

A. Walke, Anne S. Verhulst, A. Vandooren et al. · IEEE Transactions on Electron Devices · 2013 · 62 citations

Engineering, Electrical Engineering, Materials Science +17

Surface Modification of AlN Using Organic Molecular Layer for Improved Deep UV Photodetector Performance

Shuchi Kaushik, Tejas R. Naik, A. Alka et al. · ACS Applied Electronic Materials · 2020 · 58 citations

Engineering, Materials Engineering, Materials Science +17