Kaushik Nayak

DC Compact Model for SOI Tunnel Field-Effect Transistors

Bharat Bhushan, Kaushik Nayak, V. Ramgopal Rao · IEEE Transactions on Electron Devices · 2012 · 98 citations

Device Modeling, Landauer Approach, Electrical Engineering +10

CMOS Logic Device and Circuit Performance of Si Gate All Around Nanowire MOSFET

Kaushik Nayak, Mohit Bajaj, Aniruddha Konar et al. · IEEE Transactions on Electron Devices · 2014 · 77 citations

Device Modeling, Electrical Engineering, Si Nanowire +10

Random Dopant Fluctuation Induced Variability in Undoped Channel Si Gate all Around Nanowire n-MOSFET

Kaushik Nayak, Samarth Agarwal, Mohit Bajaj et al. · IEEE Transactions on Electron Devices · 2015 · 57 citations

Device Modeling, Electrical Engineering, Engineering +11

Ambient Temperature-Induced Device Self-Heating Effects on Multi-Fin Si n-FinFET Performance

Sankatali Venkateswarlu, Akhil Sudarsanan, Shiv Govind Singh et al. · IEEE Transactions on Electron Devices · 2018 · 49 citations

Engineering, Integrated Circuits, Silicon On Insulator +19

Hetero-Interfacial Thermal Resistance Effects on Device Performance of Stacked Gate-All-Around Nanosheet FET

Sankatali Venkateswarlu, Kaushik Nayak · IEEE Transactions on Electron Devices · 2020 · 43 citations

Weak Electron-phonon Coupling, Engineering, Integrated Circuits +16