Faraz Khan

Charge Trap Transistor (CTT): An Embedded Fully Logic-Compatible Multiple-Time Programmable Non-Volatile Memory Element for High- $k$ -Metal-Gate CMOS Technologies

Faraz Khan, E. Cartier, Jason C. S. Woo et al. · IEEE Electron Device Letters · 2016 · 55 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +16

The Impact of Self-Heating on Charge Trapping in High-<inline-formula> <tex-math notation="LaTeX">$k$ </tex-math></inline-formula>-Metal-Gate nFETs

Faraz Khan, E. Cartier, Chandrasekara Kothandaraman et al. · IEEE Electron Device Letters · 2015 · 34 citations

Engineering, Computer Engineering, Electrical Engineering +17

Oxygen vacancy traps in Hi-K/Metal gate technologies and their potential for embedded memory applications

C. Kothandaraman, X. Chen, D. Moy et al. · 2015 · 22 citations

Engineering, Electrical Engineering, Materials Science +17

Design Optimization and Modeling of Charge Trap Transistors (CTTs) in 14 nm FinFET Technologies

Faraz Khan, Min Han, D. Moy et al. · IEEE Electron Device Letters · 2019 · 22 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +17

80Kb 10ns read cycle logic Embedded High-K charge trap Multi-Time-Programmable Memory scalable to 14nm FIN with no added process complexity

Janakiraman Viraraghavan, Derek Leu, Balaji Jayaraman et al. · 2016 · 17 citations

Engineering, Computer Engineering, Electrical Engineering +15