Jae-Sung Kim

An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 Graphics DRAM With Low Power and Low Noise Data Bus Inversion

Seung-Jun Bae, Kwang‐Il Park, Jeong-Don Ihm et al. · IEEE Journal of Solid-State Circuits · 2008 · 65 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques

Seung-Jun Bae, Young‐Soo Sohn, Kwang‐Il Park et al. · 2008 · 47 citations

Engineering, Computer Engineering, Computer Science +17

A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking

Young-Ju Kim, Hye-Jung Kwon, Su-Yeon Doo et al. · IEEE Journal of Solid-State Circuits · 2018 · 40 citations

Engineering, Computer Engineering, Computer Architecture +16

Flexible Parylene C-Based RRAM Array for Neuromorphic Applications

Jo-Eun Kim, Boram Kim, Hui Tae Kwon et al. · IEEE Access · 2022 · 29 citations · Full text

Natural Sciences, Materials Engineering, Materials Science +17

A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking

Young-Ju Kim, Hye-Jung Kwon, Su-Yeon Doo et al. · 2018 · 28 citations

Engineering, Computer Engineering, Computer Science +17