James Hsueh-Chung Chen

Interconnect performance and scaling strategy at 7 nm node

James Hsueh-Chung Chen, T. Standaert, Emre Alptekin et al. · 2014 · 45 citations

Electrical Engineering, Physical Design (Electronics), Engineering +12

Middle of line RC performance study at the 7 nm node

Susan Fan, James Hsueh-Chung Chen, Vimal Kamineni et al. · 2017 · 17 citations

Engineering, Vlsi Design, Radio Frequency +18

Interconnect performance and scaling strategy at the 5 nm Node

James Hsueh-Chung Chen, Nicholas LiCausi, E. Todd Ryan et al. · 2016 · 17 citations

Engineering, Vlsi Design, Computer Architecture +16

56 nm pitch Cu dual-damascene interconnects with self-aligned via using negative-tone development Lithography-Etch-Lithography-Etch patterning scheme

Yannick Loquet, Yann Mignot, Christopher Waskiewicz et al. · Microelectronic Engineering · 2012 · 13 citations

Materials Science, Wafer Scale Processing, Engineering +7