Concepedia

M. Nakazawa

MN

Statistics

Publications

5

Citations

78

H-Index

5

Active since

2002

Affiliations

Toshiba (Japan)(Current)

Fujitsu (Japan)

M. Nakazawa is an author at Toshiba (Japan) specializing in microelectronics, engineering, and electrical engineering.

Top concepts

EngineeringMicroelectronicsElectrical EngineeringComputer EngineeringLow-power Electronics3D PrintingVlsi DesignApplied PhysicsInstrumentationNanoelectronics

Publications per year

2002–2021

5

Publications

5

Bitline GND sensing technique for low-voltage operation FeRAM

Shuichi Kawashima, Toshiaki Endo, A. Yamamoto et al. · IEEE Journal of Solid-State Circuits · 2002 · 24 citations

Low-power Electronics, Electrical Engineering, Engineering +10

A 45nm High Performance Bulk Logic Platform Technology (CMOS6) using Ultra High NA(1.07) Immersion Lithography with Hybrid Dual-Damascene Structure and Porous Low-k BEOL

H. Nii, T. Sanuki, Y. Okayama et al. · 2006 · 22 citations

Engineering, Ultra High Na, Wafer Scale Processing +16

An 8-Mbit 0.18-µm CMOS 1T1C FeRAM in Planar Technology

Shoichiro Kawashima, K. Morita, M. Nakazawa et al. · IEICE Transactions on Electronics · 2015 · 11 citations

3D stacked CIS compatible 40nm embedded STT-MRAM for buffer memory

M. Oka, Yoshiharu Namba, Yukio Sato et al. · 2021 · 11 citations

Management of Power and Performance with Stress Memorization Technique for 45nm CMOS

A. Eiho, T. Sanuki, E. Morifuji et al. · 2007 · 10 citations

Low-power Electronics, Electrical Engineering, Appropriate Stressor +12

1–5 of 5