C. R. Manoj

Gate Fringe-Induced Barrier Lowering in Underlap FinFET Structures and Its Optimization

Angada B. Sachid, C. R. Manoj, Dinesh K. Sharma et al. · IEEE Electron Device Letters · 2008 · 123 citations

Semiconductor Technology, Underlap Finfets, Electrical Engineering +10

Impact of High-$k$ Gate Dielectrics on the Device and Circuit Performance of Nanoscale FinFETs

C. R. Manoj, V. Ramgopal Rao · IEEE Electron Device Letters · 2007 · 101 citations

Engineering, Integrated Circuits, Interconnect (Integrated Circuits) +17

Device Design and Optimization Considerations for Bulk FinFETs

C. R. Manoj, Meenakshi Nagpal, Dhanya Varghese et al. · IEEE Transactions on Electron Devices · 2008 · 61 citations

Electrical Engineering, Engineering, Advanced Packaging (Semiconductors) +14

Impact of Fringe Capacitance on the Performance of Nanoscale FinFETs

C. R. Manoj, Angada B. Sachid, Yuan Feng et al. · IEEE Electron Device Letters · 2009 · 31 citations

Electrical Engineering, Nanoscale System, Engineering +13

Understanding and Optimization of Hot-Carrier Reliability in Germanium-on-Silicon pMOSFETs

D. Maji, Felice Crupi, E. Amat et al. · IEEE Transactions on Electron Devices · 2009 · 22 citations

Reliability, Electrical Engineering, Reliability Engineering +14