Naoto Horiguchi

The Complementary FET (CFET) for CMOS scaling beyond N3

Julien Ryckaert, P. Schuddinck, Pieter Weckx et al. · 2018 · 206 citations

Finfet Device, Engineering, Vlsi Design +18

Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

Hans Mertens, R. Ritzenthaler, Andriy Hikavyy et al. · 2016 · 192 citations

Engineering, Si Nws, Bulk Si Substrates +16

Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates

Hans Mertens, R. Ritzenthaler, Adrian Chasin et al. · 2016 · 149 citations

Semiconductors, Semiconductor Technology, Electrical Engineering +15

Vertically stacked gate-all-around Si nanowire transistors: Key Process Optimizations and Ring Oscillator Demonstration

Hans Mertens, R. Ritzenthaler, V. Peña et al. · 2017 · 124 citations

Electrical Engineering, Si Nanowire, Vlsi Design +14

Nondestructive, high-resolution, chemically specific 3D nanostructure characterization using phase-sensitive EUV imaging reflectometry

Michael Tanksalvala, Christina L. Porter, Yuka Esashi et al. · Science Advances · 2021 · 120 citations · Full text