Tarun Agarwal

2D materials: roadmap to CMOS integration

Cedric Huyghebaert, T. Schram, Quentin Smets et al. · 2018 · 94 citations

Engineering, Device Integration, Low Dimensional Material +17

Tunneling Transistors Based on MoS₂/MoTe₂ Van der Waals Heterostructures

Yashwanth Balaji, D. Mocuta, G. Groeseneken et al. · IEEE Journal of the Electron Devices Society · 2018 · 48 citations · Full text

Oxide Heterostructures, Semiconductors, Materials Science +15

Benchmarking of MoS₂FETs With Multigate Si-FET Options for 5 nm and Beyond

Tarun Agarwal, Dmitry Yakimets, Praveen Raghavan et al. · IEEE Transactions on Electron Devices · 2015 · 36 citations

Engineering, Comparison Tomug Fets, Integrated Circuits +16

A MOS capacitor model for ultra-thin 2D semiconductors: the impact of interface defects and channel resistance

Abhinav Gaur, Tarun Agarwal, Inge Asselberghs et al. · 2D Materials · 2020 · 30 citations

Dynamic tuning of the maximum contention window (CWmax) for enhanced service differentiation in IEEE 802.11 wireless ad-hoc networks

L. Gannoune, Sarika Tomar, Tarun Agarwal · 2005 · 27 citations

Dynamic Tuning, Cross-layer Optimization, Engineering +15