C. T. Wang

Wafer-Level Integration of an Advanced Logic-Memory System Through the Second-Generation CoWoS Technology

S. Y. Hou, W. Chris Chen, Clark Hu et al. · IEEE Transactions on Electron Devices · 2017 · 216 citations

Engineering, Computer Engineering, Electrical Engineering +15

Wafer Level System Integration of the Fifth Generation CoWoS®-S with High Performance Si Interposer at 2500 mm2

P. K. Huang, Chin‐Wei Lu, Wen-En Wei et al. · 2021 · 91 citations

Engineering, Computer Engineering, High-performance Computing +17

SoIC for Low-Temperature, Multi-Layer 3D Memory Integration

M. F. Chen, C. S. Lin, E.B. Liao et al. · 2020 · 50 citations

Engineering, Computer Engineering, Electrical Engineering +17

Low Temperature SoIC Bonding and Stacking Technology for 12-/16-Hi High Bandwidth Memory (HBM)

M. F. Chen, Chung-Hao Tsai, Terry Ku et al. · IEEE Transactions on Electron Devices · 2020 · 46 citations

Engineering, Computer Engineering, Electrical Engineering +15

Design and Analysis of Logic-HBM2E Power Delivery System on CoWoS^® Platform with Deep Trench Capacitor

W. T. Chen, C. C. Lin, Chung-Hsien Tsai et al. · 2020 · 29 citations

Engineering, Electrical Engineering, High-performance Computing +17