Avirup Dasgupta

A 14nm logic technology featuring 2<sup>nd</sup>-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm<sup>2</sup> SRAM cell size

S. Natarajan, M. Agostinelli, Sheikh A. Akbar et al. · 2014 · 521 citations

-Generation Finfet, Rectangular Fins, Engineering +16

BSIM-CMG: Standard FinFET compact model for advanced circuit design

Juan Pablo Duarte, Sourabh Khandelwal, Aditya Medury et al. · 2015 · 101 citations

Device Modeling, Electrical Engineering, Engineering +11

Capacitance Modeling in Dual Field-Plate Power GaN HEMT for Accurate Switching Behavior

Sheikh Aamir Ahsan, Sudip Ghosh, Khushboo Sharma et al. · IEEE Transactions on Electron Devices · 2015 · 99 citations

Engineering, Accurate Switching Behavior, Power Electronics +16

Compact Modeling of Temperature Effects in FDSOI and FinFET Devices Down to Cryogenic Temperatures

Girish Pahwa, Pragya Kushwaha, Avirup Dasgupta et al. · IEEE Transactions on Electron Devices · 2021 · 98 citations

Engineering, Integrated Circuits, Velocity Saturation Models +22

Proposal for Capacitance Matching in Negative Capacitance Field-Effect Transistors

Harshit Agarwal, Pragya Kushwaha, Yen-Kai Lin et al. · IEEE Electron Device Letters · 2019 · 96 citations

Device Modeling, Electrical Engineering, Engineering +8