T. Yoshihara

A divided word-line structure in the static RAM and its application to a 64K full CMOS RAM

Masahiko Yoshimoto, Keiko Anami, Hirofumi Shinohara et al. · IEEE Journal of Solid-State Circuits · 1983 · 167 citations

Engineering, Computer Engineering, Electrical Engineering +13

A cost-efficient high-performance dynamic TCAM with pipelined hierarchical searching and shift redundancy architecture

Haruhiko Noda, Kazunari Inoue, M. Kuroiwa et al. · IEEE Journal of Solid-State Circuits · 2005 · 104 citations

Engineering, Computer Engineering, Computer Science +17

Twisted bit-line architectures for multi-megabit DRAMs

Hideto Hidaka, K. Fujishima, Yoshio Matsuda et al. · IEEE Journal of Solid-State Circuits · 1989 · 70 citations

Engineering, Computer Engineering, Electrical Engineering +13

Analysis of coupling noise between adjacent bit lines in megabit DRAMs

Y. Konishi, M. Kumanoya, H. Yamasaki et al. · IEEE Journal of Solid-State Circuits · 1989 · 59 citations

Engineering, Electrical Engineering, Materials Science +17

A 64Kb full CMOS RAM with divided word line structure

Masahiko Yoshimoto, Keiko Anami, Hirofumi Shinohara et al. · 1983 · 46 citations

Engineering, Computer Engineering, Electrical Engineering +14