Keiko Anami

A divided word-line structure in the static RAM and its application to a 64K full CMOS RAM

Masahiko Yoshimoto, Keiko Anami, Hirofumi Shinohara et al. · IEEE Journal of Solid-State Circuits · 1983 · 167 citations

Engineering, Computer Engineering, Electrical Engineering +13

A cost-efficient high-performance dynamic TCAM with pipelined hierarchical searching and shift redundancy architecture

Haruhiko Noda, Kazunari Inoue, M. Kuroiwa et al. · IEEE Journal of Solid-State Circuits · 2005 · 104 citations

Engineering, Computer Engineering, Computer Science +17

A 20-ns 4-Mb CMOS SRAM with hierarchical word decoding architecture

T. Hirose, H. Kuriyama, Shuji Murakami et al. · IEEE Journal of Solid-State Circuits · 1990 · 59 citations

Engineering, Computer Engineering, Electrical Engineering +14

A 64Kb full CMOS RAM with divided word line structure

Masahiko Yoshimoto, Keiko Anami, Hirofumi Shinohara et al. · 1983 · 46 citations

Engineering, Computer Engineering, Electrical Engineering +14

Design consideration of a static memory cell

Keiko Anami, Masahiko Yoshimoto, Hirofumi Shinohara et al. · IEEE Journal of Solid-State Circuits · 1983 · 39 citations

Engineering, Computer Engineering, Electrical Engineering +17