K. Fujishima

A cost-efficient high-performance dynamic TCAM with pipelined hierarchical searching and shift redundancy architecture

Haruhiko Noda, Kazunari Inoue, M. Kuroiwa et al. · IEEE Journal of Solid-State Circuits · 2005 · 104 citations

Engineering, Vlsi Design, Small Cell Size +17

Twisted bit-line architectures for multi-megabit DRAMs

Hideto Hidaka, K. Fujishima, Yoshio Matsuda et al. · IEEE Journal of Solid-State Circuits · 1989 · 70 citations

Hardware Security, Electrical Engineering, Multi-megabit Drams +15

The cache DRAM architecture: a DRAM with an on-chip cache memory

Hideto Hidaka, Yoshio Matsuda, M. Asakura et al. · IEEE Micro · 1990 · 59 citations

Engineering, Memory Design, Emerging Memory Technology +18

An SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology

K. Suma, T. Tsuruda, Hideto Hidaka et al. · IEEE Journal of Solid-State Circuits · 1994 · 41 citations

Low-power Electronics, Electrical Engineering, Cmos/simox Technology +12

A 34-ns 16-Mb DRAM with controllable voltage down-converter

Hideto Hidaka, Kazutami Arimoto, K. Hirayama et al. · IEEE Journal of Solid-State Circuits · 1992 · 28 citations

Low-power Electronics, Electrical Engineering, Engineering +12