Kazutami Arimoto

A cost-efficient high-performance dynamic TCAM with pipelined hierarchical searching and shift redundancy architecture

Haruhiko Noda, Kazunari Inoue, M. Kuroiwa et al. · IEEE Journal of Solid-State Circuits · 2005 · 104 citations

Engineering, Vlsi Design, Small Cell Size +17

A built-in Hamming code ECC circuit for DRAMs

K. Furutani, Kazutami Arimoto, Hiroshi Miyamoto et al. · IEEE Journal of Solid-State Circuits · 1989 · 69 citations

Hardware Security, Error Checking, Engineering +12

A 40GOPS 250mW massively parallel processor based on matrix architecture

M. Nakajima, Haruhiko Noda, K. Dosaka et al. · 2006 · 52 citations

Engineering, Matrix Processing Engine, Computer Architecture +16

An SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology

K. Suma, T. Tsuruda, Hideto Hidaka et al. · IEEE Journal of Solid-State Circuits · 1994 · 41 citations

Low-power Electronics, Electrical Engineering, Cmos/simox Technology +12

Low voltage circuit design techniques for battery-operated and/or giga-scale DRAMs

T. Yamagata, S. Tomishima, M. Tsukude et al. · IEEE Journal of Solid-State Circuits · 1995 · 40 citations

Low-power Electronics, Non-volatile Memory, Electrical Engineering +11