Sani Nassif - Concepedia

Author

Sani Nassif

IBM Research - Austin

Also Known As

Nassif, Sani, S. A. Nassif, S. Nassif, S.R. Nassif, Sani Nassif, Sani R. Nassif, Sani Richard Nassif

Publications

972

Citations

H-Index

Concepts

All Affiliations

IBM Research - Austin IBM (United States)Arizona State University University of California, Los Angeles University of Kaiserslautern

About

Sani Nassif is an author at IBM Research - Austin specializing in engineering, computer engineering, and electrical engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	16	20	641
2	Computer Engineering	15	18	604
3	Applied Physics	3	3	70
4	Natural Sciences	1	1	28
5	Social Sciences	1	1	21

Sani Nassif

Publications

656

Citations

H-Index

Page 1

	Year	Citations
High Performance CMOS Variability in the 65nm Regime and Beyond Sani Nassif, Kerry Bernstein, D.J. Frank, Low-power ElectronicsPower ConsumptionElectrical EngineeringVirtual CrisisEngineering	2007	132
Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events Rouwaida Kanj, Sani Nassif Proceedings - ACM IEEE Design Automation Conference EngineeringVlsi DesignComputer ArchitectureMulti-channel Memory ArchitectureSram Designs	2006	78
Rigorous Extraction of Process Variations for 65-nm CMOS Design Wei Zhao, Frank Liu, Kanak Agarwal, IEEE Transactions on Semiconductor Manufacturing Hardware SecurityDevice ModelingElectrical EngineeringPhysical Design (Electronics)Engineering	2009	67
Rigorous extraction of process variations for 65nm CMOS design Wei Zhao, Yu Cao, Frank Liu, Device ModelingElectrical EngineeringPhysical Design (Electronics)EngineeringVlsi Design	2007	38
System-Level SRAM Yield Enhancement Fadi Kurdahi, Ahmed M. Eltawil, Young-Hwan Park, Hardware SecurityElectrical EngineeringMemory ArchitectureEngineeringVlsi Design	2006	32
Statistical analysis of SRAM cell stability Kanak Agarwal, Sani Nassif Proceedings - ACM IEEE Design Automation Conference Hardware SecurityNon-volatile MemoryElectrical EngineeringReliability EngineeringEngineering	2006	29
Layout Decomposition and Legalization for Double-Patterning Technology Rani S. Ghaida, Kanak Agarwal, Sani Nassif, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringElectron-beam LithographyLayout DecompositionPattern TransferComputer-aided Design	2013	28
Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience Andreas Herkersdorf, Hananeh Aliee, Michael S. Engel, Microelectronics Reliability Hardware SecurityReliabilityReliability EngineeringEngineeringHardware Reliability	2014	28
The care and feeding of your statistical static timer Sani Nassif, Duane S. Boning, Nagib Hakim EngineeringMeasurementIndustrial EngineeringElectronic Design AutomationCircuit Fabrication Process	2005	24
Simultaneous Layout Migration and Decomposition for Double Patterning Technology Chin-Hsiung Hsu, Yao‐Wen Chang, Sani Nassif IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringElectronic Design AutomationComputer ArchitecturePattern TransferComputer-aided Design	2011	21

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