Arka Dutta

Subthreshold Analog/RF Performance Enhancement of Underlap DG FETs With High- $k$ Spacer for Low Power Applications

Kalyan Koley, Arka Dutta, Binit Syamal et al. · IEEE Transactions on Electron Devices · 2012 · 64 citations

Low-power Electronics, Underlap Dg Fets, Electrical Engineering +12

Influence of Underlap on Gate Stack DG-MOSFET for analytical study of Analog/RF performance

Atanu Kundu, Arpan Dasgupta, Rahul Das et al. · Superlattices and Microstructures · 2016 · 53 citations

Electrical Engineering, Engineering, Analytical Study +6

Analysis of High-<inline-formula> <tex-math notation="LaTeX">$\kappa $ </tex-math></inline-formula> Spacer Asymmetric Underlap DG-MOSFET for SOC Application

Kalyan Koley, Arka Dutta, Samar K. Saha et al. · IEEE Transactions on Electron Devices · 2015 · 45 citations

Device Modeling, Electrical Engineering, Engineering +10

Influence of channel length and high-K oxide thickness on subthreshold analog/RF performance of graded channel and gate stack DG-MOSFETs

Sanjit Kumar Swain, Arka Dutta, Sarosij Adak et al. · Microelectronics Reliability · 2016 · 41 citations

Electrical Engineering, High-k Oxide Thickness, Engineering +7

Impact of gate metal work-function engineering for enhancement of subthreshold analog/RF performance of underlap dual material gate DG-FET

Atanu Kundu, Kalyan Koley, Arka Dutta et al. · Microelectronics Reliability · 2014 · 34 citations

Electrical Engineering, Engineering, Rf Semiconductor +5