Sanjit Kumar Swain

Influence of channel length and high-K oxide thickness on subthreshold analog/RF performance of graded channel and gate stack DG-MOSFETs

Sanjit Kumar Swain, Arka Dutta, Sarosij Adak et al. · Microelectronics Reliability · 2016 · 41 citations

Electrical Engineering, High-k Oxide Thickness, Engineering +7

Impact of InGaN back barrier layer on performance of AIInN/AlN/GaN MOS-HEMTs

Sanjit Kumar Swain, Sarosij Adak, Sudhansu Kumar Pati et al. · Superlattices and Microstructures · 2016 · 26 citations

Materials Engineering, Aluminium Nitride, Electrical Engineering +6

Study of HfAlO/AlGaN/GaN MOS-HEMT with source field plate structure for improved breakdown voltage

Sarosij Adak, Sanjit Kumar Swain, Avtar Singh et al. · Physica E Low-dimensional Systems and Nanostructures · 2014 · 24 citations

Electrical Engineering, Improved Breakdown Voltage, Engineering +5

Performance Analysis of Gate Stack DG-MOSFET for Biosensor Applications

Saradiya Kishor Parija, Sanjit Kumar Swain, Sudhansu Mohan Biswal et al. · Silicon · 2022 · 19 citations

Electrical Engineering, Engineering, Bioelectronics +4

Study of Linearity Performance of Graded Channel Gate Stacks Double Gate MOSFET with Respect to High-K Oxide Thickness

Sanjit Kumar Swain, Satish Kumar Das, Sarosij Adak · Silicon · 2019 · 17 citations

Electrical Engineering, High-k Oxide Thickness, Engineering +5