A. Dray

Method for Managing the Stress Due to the Strained Nitride Capping Layer in MOS Transistors

Stphane Orain, Vincent Fiori, A. Dray et al. · IEEE Transactions on Electron Devices · 2007 · 45 citations

Engineering, Electrical Engineering, Materials Science +17

First demonstration of a full 28nm high-k/metal gate circuit transfer from Bulk to UTBB FDSOI technology through hybrid integration

Dominique Golanski, P. Fonteneau, C. Fenouillet-Béranger et al. · 2013 · 31 citations

Engineering, Computer Engineering, Electrical Engineering +14

BIMOS transistor and its applications in ESD protection in advanced CMOS technology

Ph. Galy, Jaime Jiménez, Johan Bourgeat et al. · 2012 · 29 citations

Engineering, Electrical Engineering, Microelectronics +16

Characterization & modeling of low electric field gate-induced-drain-leakage [MOSFET]

D. Rideau, A. Dray, Fabien Gilibert et al. · 2004 · 18 citations

Engineering, Electrical Engineering, Circuit Theory +16

ESD design challenges in 28nm hybrid FDSOI/Bulk advanced CMOS process

A. Dray, Nicolas Guitard, P. Fonteneau et al. · 2012 · 17 citations

Engineering, Electrical Engineering, Microelectronics +9