Rinus T. P. Lee

Scaling Challenges for Advanced CMOS Devices

Ajey P. Jacob, Ruilong Xie, Min Gyu Sung et al. · International Journal of High Speed Electronics and Systems · 2017 · 125 citations

Engineering, Computer Engineering, Electrical Engineering +17

Threshold Voltage Shift Due to Charge Trapping in Dielectric-Gated AlGaN/GaN High Electron Mobility Transistors Examined in Au-Free Technology

Derek W. Johnson, Rinus T. P. Lee, Richard J. Hill et al. · IEEE Transactions on Electron Devices · 2013 · 66 citations

Engineering, Electrical Engineering, Materials Science +17

Nickel-Silicide:Carbon Contact Technology for N-Channel MOSFETs With Silicon–Carbon Source/Drain

Rinus T. P. Lee, Tsung-Yang Liow, Kian-Ming Tan et al. · IEEE Electron Device Letters · 2008 · 46 citations

Engineering, Electrical Engineering, Materials Science +16

N-channel FinFETs With 25-nm Gate Length and Schottky-Barrier Source and Drain Featuring Ytterbium Silicide

Rinus T. P. Lee, Andy Eu-Jin Lim, Kian-Ming Tan et al. · IEEE Electron Device Letters · 2007 · 43 citations

Engineering, Electrical Engineering, Materials Science +10

Strained p-Channel FinFETs With Extended $\Pi$-Shaped Silicon–Germanium Source and Drain Stressors

Kian-Ming Tan, Tsung-Yang Liow, Rinus T. P. Lee et al. · IEEE Electron Device Letters · 2007 · 30 citations

Engineering, Electrical Engineering, Field-programmable Gate Arrays +12