T. Sakata - Concepedia

Author

T. Sakata

Hitachi (Japan)

Also Known As

T. Sakata, Takeshi Sakata

Publications

487

Citations

H-Index

Concepts

All Affiliations

Hitachi (Japan)

About

T. Sakata is an author at Hitachi (Japan) specializing in engineering, computer engineering, and electrical engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	11	13	409
2	Computer Engineering	10	12	388
3	Electrical Engineering	10	12	393
4	Applied Physics	2	2	37
5	Materials Engineering	2	2	31

T. Sakata

Publications

437

Citations

H-Index

Page 1

	Year	Citations
Switched-source-impedance CMOS circuit for low standby subthreshold current giga-scale LSI's Masashi Horiguchi, T. Sakata, K. Itoh IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringSwitched-source-impedance Cmos CircuitEngineeringVlsi Design	1993	119
A precise on-chip voltage generator for a gigascale DRAM with a negative word-line scheme Hitoshi Tanaka, Masakazu Aoki, T. Sakata, IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignCircuit System	1999	57
Subthreshold-current reduction circuits for multi-gigabit DRAM's T. Sakata, K. Itoh, Masashi Horiguchi, IEEE Journal of Solid-State Circuits Low-power ElectronicsSubthreshold-current Reduction CircuitsElectrical EngineeringLevel HolderEngineering	1994	51
An experimental 220 MHz 1 Gb DRAM Masashi Horiguchi, T. Sakata, Tomonori Sekiguchi, Electrical EngineeringEngineeringFlash MemoryMulti-channel Memory ArchitectureIn-memory Database	2002	29
A single 1.5-V digital chip for a 10/sup 6/ synapse neural network Takao Watanabe, K. Kimura, Masahiro Aoki, IEEE Transactions on Neural Networks	1993	28
A high-speed, small-area, threshold-voltage-mismatch compensation sense amplifier for gigabit-scale DRAM arrays T. Kawahara, T. Sakata, K. Itoh, IEEE Journal of Solid-State Circuits Pmos TransistorsElectrical EngineeringEngineeringVlsi DesignGigabit-scale Dram Arrays	1993	26
Influence of Processing and of Material Defects on the Electrical Characteristics of SiC-SBDs and SiC-MOSFETs Kenji Fukuda, Akimasa Kinoshita, Takasumi Ohyanagi, Materials science forum Materials EngineeringElectrical CharacteristicsElectrical EngineeringSic WafersEngineering	2010	21
Two-dimensional power-line selection scheme for low subthreshold-current multi-gigabit DRAM's T. Sakata, K. Itoh, Masashi Horiguchi, IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringTwo-dimensional Power-line SelectionEngineeringVlsi Design	1994	21
VLSI memory technology: Current status and future trends K. Itoh, S. Kimura, T. Sakata European Solid-State Circuits Conference Hardware SecurityVlsi Memory TechnologyElectrical EngineeringNon-volatile MemoryEngineering	1999	18
Low-noise, high-speed data transmission using a ringing-canceling output buffer Tomonori Sekiguchi, Masashi Horiguchi, T. Sakata, IEEE Journal of Solid-State Circuits Ringing-canceling Output BufferEngineeringClock RecoveryData CommunicationMixed-signal Integrated Circuit	1995	16

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