2002 · 29 citations · 2 references
EngineeringComputer EngineeringComputer ScienceMemoryStorage SystemsSystem-on-chip DesignMemory DevicesMemory Hierarchy DesignMemory Hierarchy OptimizationMemory Subsystem DesignBandwidthBurst TransferData BufferingGraphics Memory SystemsHigh Bandwidth MemoryMemory Circuit DesignReliable Data TransferSynchronous Memory
With the arrival of the multimedia era, high-data-rate memory LSIs are becoming increasingly important to keep up with high-speed CPUs, graphics processors, and other consumers of stored data. Video editing and replaying of high-definition television in particular require a high bandwidth. This paper presents two circuit technologies for a synchronously operating high-data-rate 1 Gb DRAM: a distributed-column-control architecture reducing the burst-mode cycle time, and a ringing-canceling output buffer ensuring reliable high-speed data transfer.
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500 Mbyte/sec data-rate 512 Kbits*9 DRAM using a novel I/O interface
N. Kushiyama, Shigeo Ohshima, D. Stark et al. · 2003 · 24 citations
A 200mhz 16mbit Synchronous Dram With Block Access Mode
Akira Fujiwara, H. Kikukawa, Kosuke Matsuyama et al. · 2005 · 10 citations