T.W. Houston

Model for CMOS/SOI single-event vulnerability

S.E. Kerns, L. W. Massengill, D.V. Kerns et al. · IEEE Transactions on Nuclear Science · 1989 · 65 citations

Engineering, Computer Engineering, Electrical Engineering +17

A shallow trench isolation study for 0.25/0.18 μm CMOS technologies and beyond

Amitava Chatterjee, J. Esquivel, Soumya Shubhra Nag et al. · 2002 · 28 citations

Engineering, Electrical Engineering, Microelectronics +14

A guide to simulation of hysteretic gate delays based on physical understanding [SOI logic]

T.W. Houston, S. Unnikrishnan · 2002 · 24 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 65 nm CMOS technology for mobile and digital signal processing applications

A. Chattedee, J. Yoon, Song Zhao et al. · 2005 · 22 citations

Engineering, Computer Engineering, Electrical Engineering +17

Characterization of bit transistors in a functional SRAM

Xiaowei Deng, Wah Kit Loh, Beena Pious et al. · 2008 · 20 citations

Engineering, Computer Engineering, Electrical Engineering +14