Jędrzej Solecki

Logic BIST With Capture-Per-Clock Hybrid Test Points

Elham Moghaddam, Nilanjan Mukherjee, Janusz Rajski et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2018 · 42 citations

Engineering, Computer Engineering, Computer Systems +13

Low-Power Programmable PRPG With Test Compression Capabilities

Michal Filipek, Grzegorz Mrugalski, Nilanjan Mukherjee et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014 · 36 citations

Engineering, Computer Engineering, Electrical Engineering +15

Trimodal Scan-Based Test Paradigm

Grzegorz Mrugalski, Janusz Rajski, Jędrzej Solecki et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2016 · 34 citations

Engineering, Computer Engineering, Digital Design +14

Staggered ATPG with capture-per-cycle observation test points

Yingdi Liu, Janusz Rajski, S.M. Reddy et al. · 2018 · 17 citations

Engineering, Computer Engineering, Electrical Engineering +12

Time and Area Optimized Testing of Automotive ICs

Nilanjan Mukherjee, Daniel Tille, Mahendar Sapati et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2020 · 17 citations

Engineering, Automotive Engineering, Computer Engineering +14