Pulse-Based Capacitive Memory Window with High Non-Destructive Read Endurance in Fully BEOL Compatible Ferroelectric Capacitors

Abstract

Achieving an energy-efficient, non-volatile memory window (MW) with non-destructive read operation (NDRO) remains a challenge for random access memory, compute-in-memory, and machine learning frameworks. In this work, we report on achieving a record high ferroelectric (FE) capacitive MW (CMW) of ~8.7 at 0 V by introducing an interfacial asymmetry between the electrodes of a fully BEOL compatible HZO-based metal-FE-metal (MFM) FE capacitor (FeCAP). We demonstrate that the CMW can also be read non-destructively using pulses, instead of C-V measurements, which are more reflective of practical charge-based read-circuit implementations. Furthermore, for the first time, we experimentally show that the NDRO leads to a full decoupling of the read- and write-endurance, thereby allowing for a non-destructive read-endurance beyond 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> cycles even though the write-endurance is limited to ~10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> cycles. Moreover, we investigate read voltage optimization to achieve higher CMW while maintaining NDRO and bench-mark the device performance towards system realization.