Investigation of different screening methods on threshold voltage and gate oxide lifetime of SiC Power MOSFETs

Abstract

The effects of different screening methods for non-infant extrinsic defects on the gate oxide reliability of commercial 1.2 kV 4H-SiC power MOSFETs are investigated. This study aims to find the optimal screening voltage and duration for high gate-voltage pulse screening and long-term burn-in with acceptable constraints on threshold voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathbf{V}_{\mathbf{t}\mathbf{h}})$</tex> shift and oxide lifetime degradation. The <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{V}_{\mathbf{t}\mathbf{h}}$</tex> is monitored during the stress and recovery process under various screening conditions. SiC MOSFETs with the trench structure can be screened at high voltages due to the thicker gate oxide. Moreover, an optimized screening method is proposed which uses a multi-pulse mode screening technique to reduce the effects of high gate voltages on the permanent shift of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{V}_{\mathbf{t}\mathbf{h}}$</tex> . Furthermore, constant-voltage time-dependent dielectric breakdown measurements are conducted on SiC MOSFETs with and without high-voltage screening. The results reveal that high voltage applied for a short period of time <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\boldsymbol{(\leq 1}$</tex> s) has no obvious negative impact on the oxide lifetimes of SiC MOSFETs.