IEEE Solid-State Circuits Letters · 2022 · 26 citations · 13 references
EngineeringComputer EngineeringComputer ScienceLow-power DesignMachine LearningMicroelectronicsEdge ArchitectureEdge DevicesEnergy-efficient Embedded SystemsHardware AccelerationMemory Subsystem DesignPower ManagementEnergy ConsumptionEnergy-aware Edge ComputingEnergy-efficient Edge ComputingEnergy-efficient Memory DesignEnergy-efficient Parallel ComputingMemory Power OptimizationPower-efficient Memory DesignThroughput
In this letter, we present a multi-bit SRAM computing-in-memory (CIM) macro with enhanced energy efficiency for edge devices tasking machine learning (ML) deep neural networks (DNN). The proposed CIM macro computes matrix-vector multiplications (MVM) in an efficient “one-step" method reducing the energy consumption and control complexity. Furthermore, the proposed method computes not only the multiplications of a single weight but also the multi-bit weight with bit-shifting in the charge domain without the use of additional CMOS switches, thereby achieving very high energy efficiency. Measurement results in a 65-nm CMOS prototype chip show that it achieves the highest throughput of 204.8 GOPS at 1.2V and 133.6 TOPS/W at 0.85V.
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Efficient Processing of Deep Neural Networks: A Tutorial and Survey
Vivienne Sze, Yu‐Hsin Chen, Tien-Ju Yang et al. · Proceedings of the IEEE · 2017 · 4K citations