Concepedia

Memory Power Optimization

Memory Power Optimization is a power optimization technique that specifically targets the reduction of energy consumption in memory subsystems of embedded systems through architectural, circuit-level, or access-pattern modifications.

547

Publications

23.4K

Citations

1.7K

Authors

356

Institutions

Publications per year

2017–2026

97

Parents

Publications

547

1–5 of 547

Authors

1.7K

  1. MK
    Mahmut Kandemir

    Pennsylvania State University, United States

    26 publications · 1.5K citations

    17

    h-index

  2. FC
    Francky Catthoor

    IMEC, Belgium

    25 publications · 1.3K citations

    15

    h-index

  3. ND
    Nikil Dutt

    University of California, Irvine, United States

    17 publications · 939 citations

    14

    h-index

  4. PM
    Peter Marwedel

    TU Dortmund University, Germany

    12 publications · 1.1K citations

    12

    h-index

  5. CJ
    Chun Jason Xue

    City University of Hong Kong, Hong Kong SAR China

    16 publications · 383 citations

    12

    h-index

1–5 of 1.7K

Institutions

356

  1. Pennsylvania State University

    State College, United States

    20 h-index

    118 publications

    6.6K citations

  2. IMEC

    Leuven, Belgium

    17 h-index

    97 publications

    5.4K citations

  3. University of California, Irvine

    Irvine, United States

    15 h-index

    52 publications

    1.9K citations

  4. Korea Advanced Institute of Science and Technology

    Daejeon, South Korea

    14 h-index

    58 publications

    2.3K citations

  5. Intel (United States)

    Santa Clara, United States

    13 h-index

    37 publications

    1.8K citations

  6. University of Michigan

    Ann Arbor, United States

    13 h-index

    36 publications

    2.3K citations

  7. Seoul National University

    Seoul, South Korea

    12 h-index

    30 publications

    1.2K citations

  8. KU Leuven

    Leuven, Belgium

    12 h-index

    39 publications

    1.2K citations

1–8 of 356

Venues

  1. 20

    h-index

  2. IEEE Journal of Solid-State Circuits

    23 publications · 1.3K citations

    19

    h-index

  3. IEEE Transactions on Computers

    14 publications · 481 citations

    12

    h-index

  4. ACM SIGARCH Computer Architecture News

    9 publications · 781 citations

    9

    h-index

  5. 8

    h-index

1–5