A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme

Kang-Deog Suh, Byung-Hoon Suh, Youngho Um, Jin‐Ki Kim, Young-Joon Choi, Yong-Nam Koh, Sungsoo Lee, Suk-Chon Kwon, Byung‐Soon Choi, Jin-Sun Yum,

2002 · 20 citations · 3 references

Concepts

Abstract

Due to their small cell size, low power consumption, and fast page based read/program operations, NAND type flash memories are well suited for portable mass storage. This 3.3 V only 32 Mb NAND flash memory achieves typical 2.3 MB/s program performance with an incremental step pulse programming (ISPP) scheme. In addition, self-boosting of program inhibit voltages lowers the page programming current to 4.3 mA and a 24 MB/s read throughput is achieved with interleaved data paths. The device is fabricated in a 0.5 /spl mu/m CMOS process on a 94.9 mm/sup 2/ die.

References

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