2002 · 10 citations · 0 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsVlsi DesignClock Distribution NetworksClock ManagementCmos Circuit DesignDynamic Power ReductionPower OptimizationVoltage ScalingClock MechanismLow-power Circuit DesignLow-power Cmos DesignLow-power Logic DesignLow-voltage Cmos DesignThreshold VoltageThreshold Voltage ExtractionThreshold Voltage Scaling
This paper describes some of the circuit level techniques for low-power CMOS designs. V/sub TH/ control circuits are necessary for achieving low-threshold voltage in high-speed low-voltage applications. As for the low swing circuit techniques, applications to a clock system, logic part, and I/O's are discussed.