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An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices
112
Citations
4
References
2022
Year
Non-volatile MemoryEngineeringComputer ArchitectureHardware SystemsSignal MarginBattery-powered Edge-ai DevicesComputing SystemsParallel ComputingPerformance ImprovementPower-aware DesignElectrical EngineeringComputer EngineeringComputer ScienceMicroelectronicsSignal ProcessingMemory ArchitectureHardware AccelerationMac OperationsEdge ComputingEdge-ai DevicesPower-efficient ComputingIn-memory Computing
Battery-powered edge-AI devices require nonvolatile computing-in-memory (nvCIM) macros for nonvolatile data storage and multiply-and-accumulate (MAC) operations. High inference accuracy requires MAC operations with high input (IN), weight (W), and output (OUT) precisions. A high energy efficiency <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\text{EF}_{\text{MAC}})$</tex> and a short computing latency <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathrm{t}_{\text{AC}})$</tex> are also required. Most existing silicon-verified nvCIM macros use current-mode signal generation; using current [1]–[3] or hybrid current-voltage readout schemes [4]–[5] for multibit MAC operations to compensate for the small BL -voltage swing and signal margin resulting from the low read-disturb-free voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathrm{V}_{\text{RD}})$</tex> .
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