Monolithic Integration of Oxide Semiconductor FET and Ferroelectric Capacitor Enabled by Sn-Doped InGaZnO for 3-D Embedded RAM Application

Abstract

We have developed and integrated a mobility-enhanced FET and a wakeup-free ferroelectric (FE) capacitor using Sn-doped InGaZnO (IGZTO) and demonstrated 1T1C FeRAM cell operation for 3-D embedded RAM application. IGZTO FET can achieve >20 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\cdot $ </tex-math></inline-formula> s mobility with an ultrathin channel, which is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2\times $ </tex-math></inline-formula> higher than InGaZnO (IGZO) FET. The physics of mobility enhancement in oxide semiconductor FET with IGZTO channel is investigated by both experimental and simulation methods. The FE capacitor with large remanent polarization and low-temperature process at 400 °C is achieved. We have also studied the impact of thin-film access transistors on 1T1C cell operation with gate voltage dependence and capacitor size dependence. SPICE simulation is used for an extremely scaled device that achieves ~ns operation. The proposed memory technology will enable high-density and energy-efficient computing by the proximity of processor core and memory in monolithic 3-D integration.