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Enabling Continuous Cu Seed Layer for Deep Through-Silicon-Vias With High Aspect Ratio by Sequential Sputtering and Electroless Plating
28
Citations
14
References
2021
Year
EngineeringElectroless PlatingThin Film Process TechnologyChemical DepositionSilicon On InsulatorInterconnect (Integrated Circuits)Wafer Scale ProcessingAdvanced Packaging (Semiconductors)NanoelectronicsTin Barrier LayerSequential SputteringElectronic PackagingMaterials ScienceMaterials EngineeringElectrical EngineeringSemiconductor Device FabricationMicroelectronicsDepth-graded Multilayer CoatingMicrofabricationSurface ScienceApplied PhysicsThin FilmsHigh Aspect Ratio
This letter presents a new strategy for the formation of continuous Cu seed layer in high aspect ratio (HAR) through-silicon-vias (TSVs) with large depth based on sequential sputtering and electroless plating. The deposited seed layer is continuous and dense even at the bottom of the TSVs, which is difficult to achieve by individual sputtering or electroless plating. Combined with the spin coating of polyimide (PI) liner, atomic layer deposition (ALD) of TiN barrier layer, and electroplating of Cu conductor, TSVs with diameter of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$9~\mu \text{m}$ </tex-math></inline-formula> and depth of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$141~\mu \text{m}$ </tex-math></inline-formula> are successfully fabricated, and the aspect ratio is 15.5. The TSVs are fully filled without cracks or voids, proving the good quality of seed layers. Electrical measurements show that the minimum capacitance of a single TSV is around 145 fF, and the leakage current is about 3.4 pA at 20 V, indicating good electrical properties of the fabricated TSVs and the feasibility of the proposed fabrication flow in deep HAR TSV applications.
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