2005 · 20 citations · 4 references
EngineeringComputer EngineeringEmbedded SystemsLow-power DesignSystem-on-chip DesignData CompressionDynamic Power ReductionLow-power Digital Circuit DesignMixed-signal IntegrationSource CodingVoltage ScalingAudio Codec DesignDynamic Voltage And Frequency ScalingMobile System-on-chip ArchitecturePerformance OverheadSlew Rate ControlVideo CompressionVoltage Regulator IntegrationVoltage-to-frequency Conversion
A single-chip H.264/MPEG-4 audio/visual LSI for mobile applications with a module-wise dynamic voltage/frequency scaling architecture is described. This LSI operates even during the voltage/frequency transition with no performance overhead by using a dynamic de-skewing system and an on-chip voltage regulator with slew-rate control. The IC consumes 90mW in decoding QVGA H.264 video at 15f/s and MPEG-4 AAC LC audio simultaneously.
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A 60 MHz 240 mW MPEG-4 video-phone LSI with 16 Mb embedded DRAM
Takafumi Nishikawa, Masafumi Takahashi, M. Hamada et al. · 2002 · 45 citations
Engineering, Computer Engineering, Electrical Engineering +17
A 2.5 ns clock access 250 MHz 256 Mb SDRAM with a synchronous mirror delay
T. Saeki, Y. Nakaoka, M. Fujita et al. · 2002 · 35 citations
Engineering, Computer Engineering, Electrical Engineering +12
Dynamic voltage and frequency management for a low-power embedded microprocessor
S. Akui, K. Seno, Mitsuki Nakai et al. · 2004 · 35 citations
Engineering, Computer Engineering, Electrical Engineering +17