Statistics
Publications
2
Citations
45
H-Index
2
Active since
2002
Affiliations
NEC (Japan)(Current)
T. Saeki is an author at NEC (Japan) specializing in memory subsystem design, clock management, and first in first out.
Publications per year
2002–2003
2
2
A 2.5 ns clock access 250 MHz 256 Mb SDRAM with a synchronous mirror delay
T. Saeki, Y. Nakaoka, M. Fujita et al. · 2002 · 35 citations
Engineering, Computer Engineering, Electrical Engineering +12
A 30 ns 64 Mb DRAM with built-in self-test and repair function
H. Koike, Akimitsu TANABE, T. Takeshima et al. · 2003 · 10 citations
Engineering, Computer Engineering, Electrical Engineering +15
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